From 88716f47fc0879b06ef14038d9c80bc9ff5248e8 Mon Sep 17 00:00:00 2001 From: Isaku Yamahata Date: Wed, 23 Jul 2008 11:21:47 +0900 Subject: [PATCH] [IA64] Don't perform implicit sync when vps_save/restore When calling vps_save/restore, pass 1 as the third parameter not to perform implicit sync. The third parameter of vps_save/restore is used to indidate whether vps_save/restore do implicit vps_read_sync/vps_write_sync. When the third parameter is 1, it doesn't perform implicit sync. This parameter adds flexibility of vps_save/restore. This feature was newly introduced by SDM specification update June 2008. Signed-off-by: Anthony Xu --- xen/arch/ia64/vmx/vmx_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/ia64/vmx/vmx_init.c b/xen/arch/ia64/vmx/vmx_init.c index 4e2fd8a132..e832dec5c3 100644 --- a/xen/arch/ia64/vmx/vmx_init.c +++ b/xen/arch/ia64/vmx/vmx_init.c @@ -335,7 +335,7 @@ vmx_save_state(struct vcpu *v) { BUG_ON(v != current); - ia64_call_vsa(PAL_VPS_SAVE, (u64)v->arch.privregs, 0, 0, 0, 0, 0, 0); + ia64_call_vsa(PAL_VPS_SAVE, (u64)v->arch.privregs, 1, 0, 0, 0, 0, 0); /* Need to save KR when domain switch, though HV itself doesn;t * use them. @@ -359,7 +359,7 @@ vmx_load_state(struct vcpu *v) vmx_load_all_rr(v); /* vmx_load_all_rr() pins down v->arch.privregs with both dtr/itr*/ - ia64_call_vsa(PAL_VPS_RESTORE, (u64)v->arch.privregs, 0, 0, 0, 0, 0, 0); + ia64_call_vsa(PAL_VPS_RESTORE, (u64)v->arch.privregs, 1, 0, 0, 0, 0, 0); ia64_set_kr(0, v->arch.arch_vmx.vkr[0]); ia64_set_kr(1, v->arch.arch_vmx.vkr[1]); -- 2.30.2